Patent document 1 discloses a technology adhering and covering electronic components and a substrate with insulating resin in a substrate with the electronic components mounted thereon. More specifically, a substrate is housed in a mold having a shape formed along the contour including the electronic components to be covered and a substrate with those electronic components mounted thereon, and the insulating resin is injected therein.
Further, patent document 2 discloses a technology covering electronic components, which are undesirable to be adhered and covered with resin, with a typical cover, and covering other electronic components by adhering with resin. More specifically, a substrate is housed in a mold formed along the contour of electronic components to be covered, electronic components provided with a cover, and a substrate including these, and the insulating resin is injected therein. The mold is provided with a space formed so as to make contact with the cover in a surface parallel to the substrate.    Patent document 1: Japanese Patent Application Laid-Open No. 2004-111435    Patent document 2: Japanese Patent Application Laid-Open No. 2006-190726